(Solved by Humans)-1.As an example, consider a two-level cache in which the L1 hit

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  • 1.As an example, consider a two-level cache in which the L1 hit time is 5 ns, the L2 hit time is 20 ns, and the L2 miss time is 100 ns. There are 10,000 memory references of which 10 causes L2 misses and 90 causes L1 misses. Compute the hit ratios of the L1 and L2 caches and the overall effective access time.?

2a.What is an assembly language

  • b.Write an assembly language program, which adds three numbers and stores the result at ADDD. The numbers are defined at three consecutive locations?
  • ??????3a.?What?is?an?interrupt?

b. Differentiate between:

i Maskable and non-maskable interrupt (2 marks)

ii. Instruction and pseudo-instruction

  • 4a.What is Booth?s Algorithm for two 4 bits Numbers??
  • b.Using the above algorithm, multiply -7 by -3?


COA ASSIGNMENT (20 MARKS)

Please answer all questions, each question carries 5 marks.
1. As an example, consider a two-level cache in which the L1 hit time is 5 ns, the L2 hit
time is 20 ns, and the L2 miss time is 100 ns. There are 10,000 memory references of
which 10 causes L2 misses and 90 causes L1 misses. Compute the hit ratios of the L1
and L2 caches and the overall effective access time. (5 marks)
2.
a. What is an assembly language (1mark)
b. Write an assembly language program, which adds three numbers and stores the result
at ADDD. The numbers are defined at three consecutive locations (4 marks)
3. a. What is an interrupt? (1 mark)
b. Differentiate between:
i Maskable and non-maskable interrupt (2 marks)
ii. Instruction and pseudo-instruction (2 marks)
4.

a. What is Booth?s Algorithm for two 4 bits Numbers? (1 mark )
b. Using the above algorithm, multiply -7 by -3 (4 marks )



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This question was answered on: 10 May, 2025

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(Solved by Humans)-1.As an example, consider a two-level cache in which the L1 hit


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